This invention relates to integrated circuit fabrication, and more particularly, to a method for vacuum packaging integrated circuit components, or similar devices, during fabrication.
Microelectromechanical systems (MEMS) are integrated micro devices or systems combining electrical and mechanical components. MEMS devices are fabricated using standard integrated circuit batch processing techniques. MEMS devices are used in many ways including sensing, controlling, and actuating on the micro scale. MEMS devices function individually or in arrays to generate effects on a macro scale.
Many MEMS devices require a vacuum environment in order to attain maximum performance. The vacuum package also provides protection and an optimal operating environment for the MEMS device. Examples of these MEMS devices are infrared MEMS such as bolometers and certain inertial MEMS such as gyros and accelerometers. Currently MEMS devices are individually packaged in vacuum compatible packages after fabrication and dicing of the MEMS device. Often, packaging costs of MEMS devices is 10 to 100 times the fabrication costs. These high packaging costs make it difficult to develop commercially viable vacuum packaged MEMS devices.
MEMS devices are fragile especially after dicing. Care must be taken in handling these devices, and traditional integrated circuit fabrication machinery cannot adequately handle and protect MEMS devices. Therefore, special handling techniques have been developed to protect the MEMS devices until vacuum packaging has been completed. These special handling procedures add additional cost to the production of MEMS devices.
From the foregoing, a need has arisen for an improved method for vacuum packaging MEMS or similar devices during fabrication. In accordance with the present invention, an improved method for vacuum packaging MEMS or similar devices during fabrication is provided to substantially reduce disadvantages or problems associated with traditional methods of vacuum packaging MEMS or similar devices.
According to one embodiment of the present invention, there is provided a method for vacuum packaging MEMS devices during fabrication that comprises forming a plurality of MEMS devices on a device silicon wafer with each MEMS device surrounded by one of a plurality of dielectric layer rings between the perimeter of the MEMS device and any associated bonding pads. A first sealing ring is next formed on each of the plurality of dielectric layer rings. A lid wafer is formed having a plurality of second sealing rings corresponding to the plurality of first sealing rings and each of the second sealing rings surrounding a cavity in the lid wafer. Next, a sealing layer is formed on either each of the plurality of first sealing rings or each of the plurality of second sealing rings to allow eventual mating of the device wafer and the lid wafer.
The device wafer is aligned with the lid wafer such that one of the plurality of first sealing rings is aligned over one of the plurality of second sealing rings. The sealing rings of the device wafer and lid wafer are not brought into contact at this point, rather a gap is left to allow gases to escape. The device wafer and lid wafer assembly is placed in a vacuum furnace which is evacuated and heated to a temperature sufficient to allow outgassing of all surface areas. After all surface areas are outgassed, the gap between the device wafer and lid wafer is closed causing one of the plurality of first sealing rings to make contact with one of the plurality of second sealing rings thereby creating a vacuum package enclosing each MEMS device on the device wafer. Next, the assembly is cooled at a maximum rate in order to minimize subsequent outgassing of surfaces within the vacuum areas of the assembly while at the same time preventing thermal stresses on the assembly.
The present invention provides various advantages over traditional vacuum packaging methods. One technical advantage of the present invention is that vacuum packaging is incorporated into the fabrication process of MEMS devices. Another technical advantage is the elimination of individual MEMS vacuum packaging and individual die handling. Yet another advantage of the present invention is that all MEMS devices on a silicon wafer are vacuum packaged at one time during device fabrication, thereby significantly reducing the costs associated with vacuum packaging MEMS devices. This reduction in costs should result in the development of commercially viable MEMS devices. Yet another advantage of the present invention is that MEMS devices are protected at an earlier stage in fabrication. Another advantage is the ability to use traditional methods of handling integrated circuits after a MEMS device is vacuum packaged and diced. Still another advantage of the present invention is the ability to test all MEMS devices after vacuum packaging but before dicing using traditional integrated circuit testing procedures. Other advantages may be readily ascertainable by those skilled in the art.